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DATA SHEET
MOS INTEGRATED CIRCUIT
PD168101
MONOLITHIC QUAD H-BRIDGE DRIVER CIRCUIT
DESCRIPTION
The PD168101 is monolithic quad H-bridge driver LSI which uses power MOSFETs in the output stages. By using the MOS process, this driver IC has substantially improved the voltage loss of the output stage and power consumption as compared with conventional driver circuits using bipolar transistors. By eliminating the charge pump circuit, the current during power-OFF is drastically decreased. In addition, a low-voltage malfunction prevention circuit is also provided that prevents the IC from malfunctioning when the supply voltage drops. As the package, a 24-pin plastic TSSOP is adopted to enable the creation of compact, slim application sets. This driver IC can drive two stepping motor at the same time, and is ideal for driving stepping motors in the lens of a camera. It is the best for lens drive drivers, such as a digital camera and a video camera. Moreover, since the input of two terminals is respectively owned to H bridge 1 circuit, a maximum of four loads, such as DC motor, can be driven simultaneously.
FEATURES
Four H bridge circuits employing power MOSFETs Low current consumption by eliminating charge pump VM pin current when power-OFF: 10 A MAX. VDD pin current: 10 A MAX. Input logic frequency: 100 kHz 3-V power supply Minimum operating supply voltage: 2.5 V Low voltage malfunction prevention circuit 24-pin plastic TSSOP (5.72 mm (225))
ORDERING INFORMATION
Part Number Package 24-pin plastic TSSOP (5.72 mm (225))
PD168101MA-6A5
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S14846EJ1V0DS00 (1st edition) Date Published April 2001 N CP(K) Printed in Japan
(c)
2001
PD168101
ABSOLUTE MAXIMUM RATINGS (TA = 25C)
When mounted on a glass epoxy board (10 cm x 10 cm x 1 mm, 15% copper foil)
Parameter Control block supply voltage VM Input voltage Output terminal voltage Output current IM(pulse) Power consumption Peak junction temperature Storage temperature range PT TCH(MAX) Tstg VIN VOUT IM(DC) DC PW 10 ms, Duty 5% Symbol VDD Condition Rating -0.5 to +6.0 -0.5 to +6.0 -0.5 to VDD + 0.5 6.2 0.35 0.7 0.7 150 -55 to +150 Unit V V V V A/ch A/ch W C C
RECOMMENDED OPERATING CONDITIONS
When mounted on a glass epoxy board (10 cm x 10 cm x 1 mm, 15% copper foil)
Parameter Control block supply voltage VM Output current Operating frequency Operating temperature range Peak junction temperature IM(DC) fIN TA TCH(MAX) DC IN terminal -10 2.7 -0.25 5.5 +0.25 100 85 125 V A kHz C C Symbol VDD Condition MIN. 2.5 TYP. MAX. 5.5 Unit V
2
Data Sheet S14846EJ1V0DS
PD168101
CHARACTERISTICS (Unless otherwise specified, VDD = VM = 3 V, TA = 25C)
Parameter Off state VM pin current VDD terminal current at the time of standby VDD terminal current at the time of operation High level input current Low level input current Input pull down resistance High level input voltage Low level input voltage H-bridge ON resistance Low voltage malfunction prevention circuit operating voltage H bridge output turn-on time 1 H bridge output turn-on time 2 H bridge output turn-off time H bridge output rise time H bridge output fall time Symbol IM(OFF) Condition All control terminal = 0 V Per VM terminal All control terminal = 0 V MIN. TYP. MAX. 10 Unit
A A
mA mA
IDD(ST)
10
IDD IIH IIL RIND VIH VIL RON VDDS1 VDDS2 tON1 tON2 tOFF tr tf RM = 20 , Figure 1 tON1: turn-on time from all control = 0 V tON2: turn-on time at operation 2.5 V VDD 5.5 V 2.5 V VDD 5.5 V 2.7 V VM = VDD 5.5 V IM = 0.25 A, Upper + lower VM = 5 V, -10C TA +85C VM = 3 V, -10C TA +85C 0.8 0.65 1.0 0.7 0.2 0.3 0.07 VIN = VDD VIN = 0 V -1.0 50 0.7 x VDD -0.3 0.7
1 0.06
A
200 VDD+0.3 0.3 x VDD 1.1 2.5 2.5 k V V V V
s
2.0 0.5 1.0 0.2
s s s s
Remarks 1. As for thermal shutdown circuit (TSD), junction temperature operates above 150C. At the time of over thermal detection, current supply is stopped by making all output terminals into high impedance. In addition, thermal shutdown circuit does not operate at the time of standby. 2. A low voltage malfunction operation prevention circuit operates, if a voltage power supply (VDD) becomes less than 2.5 V. All output terminals be high impedance at the time of UVLO operation.
Data Sheet S14846EJ1V0DS
3
PD168101
Figure 1. Switching time condition (1) IN2 = Low-level
100% 90% VIN1 10% tON tr OUT1AOUT1B 90% IM Hi-Z 10% 10% Hi-Z 90% tOFF tf
(2) IN2 = High-level
100% 90% VIN1 10% tOFF tf OUT1BOUT1A 90% IM 10% brake 10% tON tr OUT1BOUT1A 90%
FUNCTION TABLE
The logic of each channel is as follows Channel 1
IN1 L L H H IN2 L H L H OUT1A Z L H L OUT1B Z H L L
Channel 2
IN3 L L H H IN4 L H L H OUT2A Z L H L OUT2B Z H L L
Channel 3
IN5 L L H H IN6 L H L H OUT3A Z L H L OUT3B Z H L L
Channel 4
IN7 L L H H IN8 L H L H OUT4A Z L H L OUT4B Z H L L
H: High-level, L: Low-level, Z: High impedance When all control pin is low-level, IC becomes stand-by state and current consumption is reduced.
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Data Sheet S14846EJ1V0DS
PD168101
PIN CONNECTION
VM1 OUT1A PGND OUT2A OUT3A PGND OUT4A VM4 IN1 IN2 IN3 IN4 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VDD OUT1B PGND OUT2B VM23 OUT3B PGND OUT4B IN8 IN7 IN6 IN5
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Pin name VM1 OUT1A PGND OUT2A OUT3A PGND OUT4A VM4 IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 OUT4B PGND OUT3B VM23 OUT2B PGND OUT1B VDD
Pin function Output block supply voltage input terminal Output terminal Ground terminal Output terminal Output terminal Ground terminal Output terminal Output block supply voltage input terminal Control terminal (channel 1) Control terminal (channel 1) Control terminal (channel 2) Control terminal (channel 2) Control terminal (channel 3) Control terminal (channel 3) Control terminal (channel 4) Control terminal (channel 4) Output terminal Ground terminal Output terminal Output block supply voltage input terminal Output terminal Ground terminal Output terminal Control block supply voltage input terminal
Data Sheet S14846EJ1V0DS
5
PD168101
BLOCK DIAGRAM
24 VDD
TSD
UVLO VM1 1
IN1 9 IN2 10 Control circuit (1) H-bridge (1)
1A 1B
2 23
PGND
3
VM2, 3 20 IN3 11 IN4 12 PGND Control circuit (2) H-bridge (2) 2A 2B 21 22 4
IN5 13 IN6 14 Control circuit (3) H-bridge (3)
3A 3B
5 19
PGND
6
VM4 8 IN7 15 IN8 16 PGND Control circuit (4) H-bridge (4) 4A 4B 17 18 7
Cautions 1. The terminal which has more than one should connect not only one terminal but all terminals. 2. Pull down resistance is connected to the input terminal. It's not necessary that the input terminal is connected when it isn't used. 3. The motor part power supply terminals VM1, VM23, and VM4 are separated inside, and can impress an individually different power supply. 4. The motor part power supply terminal of the output which is not used should impress voltage of recommended operation condition, or should connect to GND. In addition, if voltage is impressed to VM terminal even when an input is open, VM terminal current (10 AMAX) is flow at the time of standby.
6
Data Sheet S14846EJ1V0DS
PD168101
TYPICAL CHARACTERISTICS
PT vs. TA characteristics
1
Total power dissipation PT (W) VDD pin current IDD, IDD(ST) (mA)
IDD, IDD(ST) vs. VDD characteristics
1 TA = 25C 0.8 IDD 0.6
0.8
0.7 W
0.6
178C/W
0.4
0.4
0.2
0.2 IDD(ST) 0 1 2 3 4 5 6
0 -10
10
30
50
70
90
100
Ambient temperature TA (C)
Control block supply voltage VDD (V)
IM vs. VM characteristics
OFF state VM pin current IM(OFF) ( A)
IIH, IIL vs. VDD characteristics
60 TA = 25C
Input current IH, IIL ( A)
30 TA = 25C 25 20 15 10 5
50 IIH 40 30 20 10 IIL
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Output block supply voltage VM (V)
Control block supply voltage VDD (V)
RIND vs. VDD characteristics
Input pull-down resistance RIND (k)
VIH, VIL vs. VDD characteristics
5 TA = 25C
Input voltage VIH, VIL (V)
200 TA = 25C
4
150
3 VIH, VIL 2
100
50
1
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Control block supply voltage VDD (V)
Control block supply voltage VDD (V)
Data Sheet S14846EJ1V0DS
7
PD168101
Detect voltage at low voltage characteristics
2 1.5
RON vs. VM characteristics
H-bridge ON resistance RON ()
TA = 25C IM = 0.25 A 1
TA = 25C
VDD (LH)
Detect voltage VDDS (V)
1.5 VDD (HL) 1
0.5
0.5
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Output block supply voltage VM (V)
Output block supply voltage VM (V)
RON vs. TA characteristics
1.5
tON1, tON2, tOFF vs. VM characteristics
H-bridge output turn-on time tON1, tON2 ( s) H-birdge output turn-off time tOFF (s)
2 TA = 25C RM = 20 1.6 tON1 tON2
H-bridge ON resistance RON ()
VM = 2.7 V IM = 0.25 A
1
1.2
0.8
0.5
0.4 tOFF 0 1 2 3 4 5 6
0 -20
0
20
40
60
80
100
Ambient temperature TA (C)
Output block supply voltage VM (V)
tr, tf vs. VM characteristics
1
H-bridge output rise time tr ( s) H-bridge output fall time tf ( s)
TA = 25C RM = 20 0.8
0.6 tr 0.4
0.2 tf 0 1 2 3 4 5 6
Output block supply voltage VM (V)
8
Data Sheet S14846EJ1V0DS
STANDARD CONNECTION EXAMPLE
This circuit diagram is an example of connection, and is not a thing aiming at mass production.
VDD = VM = 2.7 V to 5.5 V DC/DC CONVERTER
1 to 10 F Battery VM4 TSD VDD H bridge 1 UVLO H bridge 2 PGND Control circuit 3A Level Shift circuit H bridge 3 PGND 4A H bridge 4 4B PGND 3B PGND 2A 2B 1A 1B VM2, 3 VM1
1 to 10 F
Data Sheet S14846EJ1V0DS
Motor 1
IN1 IN2 IN3 IN4 CPU IN5 IN6 IN7 IN8
Motor 2
GND
PD168101
9
PD168101
PACKAGE DIMENSION
24-PIN PLASTIC TSSOP (5.72 mm (225))
24 13 detail of lead end F G R
P
L S
1
12
E
A A' S
H I J
C D M
M
K B
N
S
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
ITEM A A' B C D E F G H I J K L M N P R S
MILLIMETERS 6.650.10 6.50.1 0.575 0.5 (T.P.) 0.220.05 0.10.05 1.2 MAX. 1.00.05 6.40.1 4.40.1 1.00.1 0.170.025 0.5 0.10 0.08 3+5 -3 0.25 0.60.15 P24MA-50-6A5
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Data Sheet S14846EJ1V0DS
PD168101
RECOMMENDED SOLDERING CONDITIONS
Solder this product under the following recommended conditions. For soldering methods and conditions other than those recommended, consult NEC. For details of the recommended soldering conditions, refer to information document "Semiconductor Device Mounting Technology Manual".
Recommended Condition Symbol
Soldering Method
Soldering Conditions Package peak temperature: 235C; Time: 30 secs. max. (210C min.); Number of times: 3 times max; Number of day: none; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2Wt% max.) is recommended. Package peak temperature: 215C; Time: 40 secs. max. (200C min.); Number of times: 3 times max.; Number of day: none; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.) is recommended. Package peak temperature: 260C; Time: 10 secs. max.; Preheating temperature: 120C max.; Number of times: once; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.) is recommended.
Infrared reflow
IR35-00-3
VPS
VP15-00-3
Wave soldering
WS60-00-1
Caution Do not use two or more soldering methods in combination.
Data Sheet S14846EJ1V0DS
11
PD168101
[MEMO]
12
Data Sheet S14846EJ1V0DS
PD168101
[MEMO]
Data Sheet S14846EJ1V0DS
13
PD168101
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
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Data Sheet S14846EJ1V0DS
PD168101
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:
* * * * *
Device availability Ordering information Product release schedule Availability of related technical literature Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) Network requirements
*
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country.
NEC Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
NEC Electronics (Germany) GmbH
Benelux Office Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580
NEC Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
NEC Electronics Hong Kong Ltd. NEC Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-3067-5800 Fax: 01-3067-5899 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
NEC Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 03 02 Fax: 0211-65 03 490
NEC Electronics (France) S.A. NEC Electronics (UK) Ltd.
Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 091-504-2787 Fax: 091-504-2860
NEC Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
NEC Electronics Taiwan Ltd. NEC Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99
NEC Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
NEC do Brasil S.A.
Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829
J01.2
Data Sheet S14846EJ1V0DS
15
PD168101
* The information in this document is current as of March, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4

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